Field of the Invention
The invention relates to a method for fabricating a p-channel field-effect transistor on a semiconductor substrate, which has an n-doped gate electrode, a p-doped source region and a p-doped drain region.
In the fabrication of memory modules, in particular a dynamic memory (DRAM), the general endeavor as technology advances is to continuously reduce the feature sizes of the components of which the respective module is composed. The reason is for improved performance of the module and for lower process costs during the semiconductor fabrication. In the case of CMOS technology that is customarily used to fabricate circuits, both n-channel and p-channel field-effect transistors constitute the components that are fundamentally used together in a circuit. In order to keep down the costs for fabricating the memory modules, in this case the gate electrodes of both types are generally embodied with the same doping, for example an n+-type doping in the gates formed as polysilicon. The corresponding fabrication methods are called single work function processes.
In contrast to this, however, it is possible, by additional processes, to form in each case different dopings of the gate electrodes for the respective types of field-effect transistors. Although this makes the fabrication more expensive, the respective circuits can be optimized as a result of this, so that these processes, called dual work function, are generally used for logic modules.
Accordingly, in the case of memory modules, by way of example, p-channel field-effect transistors are formed with n+-doped gate electrodes. In this case, in order to set a desired threshold voltage of the p-channel field-effect transistor, it is necessary to carry out a counter doping with acceptors at the surface of the substrate below the gate oxide of the gate electrode—in the n-type well. This pushes the actual channel deeper into the substrate—a buried channel is produced.
The n-channel field-effect transistors that are likewise present on the memory module do not require this counter doping; they are operated with a surface channel.
In order to reduce feature sizes, i.e. the sizes of components, on a memory module, it is also necessary to shorten the vertical well profiles. The depth of the buried channel is likewise affected by this. In this case, however, the problem arises that boron atoms, for example, segregate into the gate oxide during an oxidation step following the implantation step required for the counter doping, and thus lead to a sharp drop in the particle density of boron atoms at the gate junction. In order to compensate for the drop in the particle number density that is necessary for setting the threshold voltage of the field-effect transistor, a higher dose is used in the implantation step for the counter doping, thereby increasing the depth of the buried channel in a disadvantageous manner. As a result, the effective gate oxide thickness also increases, however, so that the short channel behavior of the buried channel degrades in a disadvantageous manner. On account of the implantation profile produced by the segregation and diffusion, it is also difficult to realize a reduction of the vertical sizes of the p-channel field-effect transistor.
To date, a number of solutions have been proposed to enable a miniaturization of the buried channel scale. These include, by way of example, buried channel epitaxy for suppressing diffusion during brief thermal loading in order to obtain shallow buried channels or the use of antimony as a donor for so-called anti-punch implantation. The first solution leads to considerably increased costs, while problems with contaminants in the implantation apparatus can occur due to the second solution. Further solutions contain gate oxidation processes at low temperatures, which, however, have a disadvantageous influence on the retention time of the cell in a memory application due to the wet process baths associated therewith, or so-called strong halo implantation. An ion implantation through the gate oxide, i.e. a counter doping after the oxidation step, also leads to disadvantageous contaminants in the subsequent process steps.